diff --git a/apps/main.c b/apps/main.c
index a912e07..ed7ca29 100644
--- a/apps/main.c
+++ b/apps/main.c
@@ -550,9 +550,28 @@ void cop_main(void)
    platforms which support it.
 
    At present all we do is send the COP to sleep if anything wakes it. */
-    while(1) {
+    long i;
+    unsigned long* memmapregs = (unsigned long*)0xf000f000;
+
+    (*(volatile unsigned long*)(0x60004134)) |= 0x10; /* Set mailbox interrupt */
+
+    while(CPU_MESSAGE != COP_REBOOT) {
         COP_CTL = PROC_SLEEP;
     }
+    COP_REPLY = 1;
+    /* Invalidate cache */
+    outl(inl(0xf000f044) | 0x6, 0xf000f044);
+    while ((inl(0x6000c000) & 0x8000) != 0) {}
+    
+    /* Disable cache */
+    outl(0x0, 0x6000C000);
+
+
+    asm volatile(
+        "mov   r0, #0x10000000   \n"
+        "mov   pc, r0            \n"
+    );
+
 }
 #endif
 
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 1a3e0be..ac2ee68 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -280,6 +280,8 @@
 
 #define NUM_CORES 1
 #define CURRENT_CORE 0
+
+#define COP_REBOOT 0x00000001
 #else
 #define NUM_CORES 1
 #define CURRENT_CORE 0
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index d304895..d9fd738 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -25,6 +25,15 @@
 #define CPU_CTL          (*(volatile unsigned long *)(0x60007000))
 #define COP_CTL          (*(volatile unsigned long *)(0x60007004))
 
+/* Mailboxes */
+/* Each processor has two mailboxes it can write to and two which
+   it can read from.  We define the first to be for sending messages
+   and the second for replying to messages */
+#define CPU_MESSAGE      (*(volatile unsigned long *)(0x60001000))
+#define COP_MESSAGE      (*(volatile unsigned long *)(0x60001004))
+#define CPU_REPLY        (*(volatile unsigned long *)(0x60001008))
+#define COP_REPLY        (*(volatile unsigned long *)(0x6000100c))
+
 #define GPIOA_ENABLE     (*(volatile unsigned long *)(0x6000d000))
 #define GPIOB_ENABLE     (*(volatile unsigned long *)(0x6000d004))
 #define GPIOC_ENABLE     (*(volatile unsigned long *)(0x6000d008))
diff --git a/firmware/rolo.c b/firmware/rolo.c
index 84b3280..05778da 100644
--- a/firmware/rolo.c
+++ b/firmware/rolo.c
@@ -78,6 +78,9 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
         : : "a"(dest)
     );
 #elif (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024)
+
+    CPU_MESSAGE = COP_REBOOT;
+    while(COP_REPLY != 1) {}
     /* Flush cache */
     outl(inl(0xf000f044) | 0x2, 0xf000f044);
     while ((inl(0x6000c000) & 0x8000) != 0) {}
@@ -85,6 +88,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
     /* Disable cache */
     outl(0x0, 0x6000C000);
 
+    
     /* Reset the memory mapping registers to zero */
     for (i=0;i<8;i++)
         memmapregs[i]=0;