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Anonymous
Sunday, November 11th, 2007 at 4:40:33pm UTC 

  1. Index: firmware/app.lds
  2. ===================================================================
  3. --- firmware/app.lds    (revision 15577)
  4. +++ firmware/app.lds    (working copy)
  5. @@ -60,9 +60,8 @@
  6.  #define IRAMSIZE 0x7000
  7.  #elif CONFIG_CPU==S3C2440
  8.  #define DRAMORIG 0x00000100 + STUBOFFSET
  9. -#define IRAMORIG DRAMORIG
  10. +#define IRAMORIG 0x40000000
  11.  #define IRAMSIZE 0x1000
  12. -#define IRAM DRAM
  13.  #elif CONFIG_CPU==DM320
  14.  #define DRAMORIG 0x00900000 + STUBOFFSET
  15.  #define IRAMORIG 0x00000000
  16. @@ -86,9 +85,7 @@
  17.  MEMORY
  18.  {
  19.      DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
  20. -#if CONFIG_CPU != S3C2440
  21.      IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
  22. -#endif
  23.  #if CONFIG_CPU==PNX0101
  24.      IRAM0 : ORIGIN = IRAM0ORIG, LENGTH = IRAM0SIZE
  25.  #endif
  26. @@ -182,7 +179,94 @@
  27.         _end = .;
  28.      } > DRAM
  29.  
  30. -#else /* End DM320 */
  31. +#elif CONFIG_CPU==S3C2440
  32. +    .text :
  33. +    {
  34. +        loadaddress = .;
  35. +        _loadaddress = .;
  36. +        . = ALIGN(0x200);
  37. +        *(.init.text)
  38. +        *(.text*)
  39. +        *(.glue_7)
  40. +        *(.glue_7t)
  41. +        . = ALIGN(0x4);
  42. +    } > DRAM
  43. +
  44. +    .rodata :
  45. +    {
  46. +        *(.rodata)  /* problems without this, dunno why */
  47. +        *(.rodata*)
  48. +        *(.rodata.str1.1)
  49. +        *(.rodata.str1.4)
  50. +        . = ALIGN(0x4);
  51. +
  52. +        /* Pseudo-allocate the copies of the data sections */
  53. +        _datacopy = .;
  54. +    } > DRAM
  55. +
  56. +    /* TRICK ALERT! For RAM execution, we put the .data section at the
  57. +       same load address as the copy. Thus, we don't waste extra RAM
  58. +       when we don't actually need the copy.  */
  59. +    .data : AT ( _datacopy )
  60. +    {
  61. +        _datastart = .;
  62. +        *(.data*)
  63. +        . = ALIGN(0x4);
  64. +        _dataend  = .;
  65. +    } > DRAM
  66. +
  67. +    /DISCARD/ :
  68. +    {
  69. +        *(.eh_frame)
  70. +    }
  71. +
  72. +    .vectors 0x0 :
  73. +    {
  74. +        _vectorsstart = .;
  75. +        *(.vectors);
  76. +        _vectorsend = .;
  77. +    } AT> DRAM
  78. +
  79. +    _vectorscopy = LOADADDR(.vectors);
  80. +
  81. +    .iram IRAMORIG :
  82. +    {
  83. +        _iramstart = .;
  84. +        *(.icode)
  85. +        *(.irodata)
  86. +        *(.idata)
  87. +        _iramend = .;
  88. +    } > IRAM AT> DRAM
  89. +
  90. +    _iramcopy = LOADADDR(.iram);
  91. +
  92. +    .ibss (NOLOAD) :
  93. +    {
  94. +        _iedata = .;
  95. +        *(.ibss)
  96. +        . = ALIGN(0x4);
  97. +        _iend = .;
  98. +    } > DRAM
  99. +
  100. +    .stack ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
  101. +    {
  102. +       *(.stack)
  103. +       stackbegin = .;
  104. +       . += 0x2000;
  105. +       stackend = .;
  106. +    } > DRAM
  107. +
  108. +    .bss :
  109. +    {
  110. +       _edata = .;
  111. +        *(.bss*)
  112. +        *(COMMON)
  113. +        . = ALIGN(0x4);
  114. +       _end = .;
  115. +    } > DRAM
  116. +
  117. +#else /* End CONFIG_CPU */
  118. +
  119.  #if !defined(CPU_ARM)
  120.      .vectors :
  121.      {
  122. @@ -241,11 +325,7 @@
  123.      }
  124.  
  125.  #if defined(CPU_ARM)
  126. -#if CONFIG_CPU==DM320
  127. -    .vectors IRAMORIG :
  128. -#else
  129.      .vectors 0x0 :
  130. -#endif
  131.      {
  132.          _vectorsstart = .;
  133.          *(.vectors);
  134. @@ -253,8 +333,6 @@
  135.  #if CONFIG_CPU==PNX0101
  136.          *(.dmabuf)
  137.      } >IRAM0 AT> DRAM
  138. -#elif CONFIG_CPU==DM320
  139. -    } > IRAM AT> DRAM
  140.  #else
  141.      } AT> DRAM
  142.  #endif
  143. @@ -264,8 +342,6 @@
  144.  
  145.  #if CONFIG_CPU==PNX0101
  146.      .iram IRAMORIG + SIZEOF(.vectors) :
  147. -#elif CONFIG_CPU==S3C2440 || CONFIG_CPU==DM320
  148. -    .iram :
  149.  #else
  150.      .iram IRAMORIG :
  151.  #endif
  152. @@ -325,7 +401,7 @@
  153.  
  154.  #if defined(CPU_COLDFIRE)
  155.      .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
  156. -#elif defined(CPU_ARM) && CONFIG_CPU != S3C2440
  157. +#elif defined(CPU_ARM)
  158.      .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
  159.  #else
  160.      .bss :

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