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Sunday, February 25th, 2007 at 1:22:10pm UTC 

  1. diff --git a/apps/main.c b/apps/main.c
  2. index a912e07..6edae5f 100644
  3. --- a/apps/main.c
  4. +++ b/apps/main.c
  5. @@ -106,6 +106,8 @@
  6.  #include "cuesheet.h"
  7.  
  8.  /*#define AUTOROCK*/ /* define this to check for "autostart.rock" on boot */
  9. +volatile unsigned char IDATA_ATTR CPU_MESSAGE=0;
  10. +volatile unsigned char IDATA_ATTR CPU_REPLY=0;
  11.  
  12.  const char appsversion[]=APPSVERSION;
  13.  
  14. @@ -542,6 +544,28 @@ static void init(void)
  15.  }
  16.  
  17.  #ifdef CPU_PP
  18. +void cop_rolo(void) ICODE_ATTR;
  19. +void cop_rolo(void)
  20. +{
  21. +    /* Invalidate cache */
  22. +    outl(inl(0xf000f044) | 0x6, 0xf000f044);
  23. +    while ((inl(0x6000c000) & 0x8000) != 0) {}
  24. +   
  25. +    /* Disable cache */
  26. +    outl(0x0, 0x6000C000);
  27. +
  28. +    /* Wait while RoLo loads the image into SDRAM */
  29. +    /* TODO: Accept checksum failure gracefully */
  30. +    while(CPU_MESSAGE == 1) {}
  31. +
  32. +    CPU_REPLY = 1;
  33. +
  34. +    asm volatile(
  35. +        "mov   r0, #0x10000000   \n"
  36. +        "mov   pc, r0            \n"
  37. +    );
  38. +}
  39. +
  40.  void cop_main(void)
  41.  {
  42.  /* This is the entry point for the coprocessor
  43. @@ -550,9 +574,15 @@ void cop_main(void)
  44.     platforms which support it.
  45.  
  46.     At present all we do is send the COP to sleep if anything wakes it. */
  47. -    while(1) {
  48. +    long i;
  49. +    unsigned long* memmapregs = (unsigned long*)0xf000f000;
  50. +
  51. +    (*(volatile unsigned long*)(0x60004134)) |= 0x10; /* Set mailbox interrupt */
  52. +
  53. +    while(CPU_MESSAGE != COP_REBOOT) {
  54.          COP_CTL = PROC_SLEEP;
  55.      }
  56. +    cop_rolo();
  57.  }
  58.  #endif
  59.  
  60. diff --git a/firmware/export/config.h b/firmware/export/config.h
  61. index 1a3e0be..ac2ee68 100644
  62. --- a/firmware/export/config.h
  63. +++ b/firmware/export/config.h
  64. @@ -280,6 +280,8 @@
  65.  
  66.  #define NUM_CORES 1
  67.  #define CURRENT_CORE 0
  68. +
  69. +#define COP_REBOOT 0x00000001
  70.  #else
  71.  #define NUM_CORES 1
  72.  #define CURRENT_CORE 0
  73. diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
  74. index d304895..1cc23e9 100644
  75. --- a/firmware/export/pp5020.h
  76. +++ b/firmware/export/pp5020.h
  77. @@ -25,6 +25,17 @@
  78.  #define CPU_CTL          (*(volatile unsigned long *)(0x60007000))
  79.  #define COP_CTL          (*(volatile unsigned long *)(0x60007004))
  80.  
  81. +/* Mailboxes */
  82. +/* Each processor has two mailboxes it can write to and two which
  83. +   it can read from.  We define the first to be for sending messages
  84. +   and the second for replying to messages */
  85. +#if 0
  86. +#define CPU_MESSAGE      (*(volatile unsigned long *)(0x60001000))
  87. +#define COP_MESSAGE      (*(volatile unsigned long *)(0x60001004))
  88. +#define CPU_REPLY        (*(volatile unsigned long *)(0x60001008))
  89. +#define COP_REPLY        (*(volatile unsigned long *)(0x6000100c))
  90. +#endif
  91. +
  92.  #define GPIOA_ENABLE     (*(volatile unsigned long *)(0x6000d000))
  93.  #define GPIOB_ENABLE     (*(volatile unsigned long *)(0x6000d004))
  94.  #define GPIOC_ENABLE     (*(volatile unsigned long *)(0x6000d008))
  95. diff --git a/firmware/rolo.c b/firmware/rolo.c
  96. index 84b3280..cc97632 100644
  97. --- a/firmware/rolo.c
  98. +++ b/firmware/rolo.c
  99. @@ -63,6 +63,8 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
  100.      long i;
  101.      unsigned char* localdest = dest;
  102.  #if (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024)
  103. +    extern volatile unsigned char CPU_MESSAGE;
  104. +    extern volatile unsigned char CPU_REPLY;
  105.      unsigned long* memmapregs = (unsigned long*)0xf000f000;
  106.  #endif
  107.  
  108. @@ -78,6 +80,10 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
  109.          : : "a"(dest)
  110.      );
  111.  #elif (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024)
  112. +
  113. +    CPU_MESSAGE = 0;
  114. +    COP_CTL = PROC_WAKE;
  115. +
  116.      /* Flush cache */
  117.      outl(inl(0xf000f044) | 0x2, 0xf000f044);
  118.      while ((inl(0x6000c000) & 0x8000) != 0) {}
  119. @@ -85,10 +91,13 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
  120.      /* Disable cache */
  121.      outl(0x0, 0x6000C000);
  122.  
  123. +   
  124.      /* Reset the memory mapping registers to zero */
  125.      for (i=0;i<8;i++)
  126.          memmapregs[i]=0;
  127.  
  128. +    while(CPU_REPLY != 1) {}
  129. +
  130.      asm volatile(
  131.          "mov   r0, #0x10000000   \n"
  132.          "mov   pc, r0            \n"
  133. @@ -117,6 +126,9 @@ int rolo_load(const char* filename)
  134.      long file_length;
  135.      unsigned short checksum,file_checksum;
  136.  #endif
  137. +#ifdef CPU_PP
  138. +    extern volatile unsigned char CPU_MESSAGE;
  139. +#endif
  140.      unsigned char* ramstart = (void*)&loadaddress;
  141.  
  142.      lcd_clear_display();
  143. @@ -150,6 +162,10 @@ int rolo_load(const char* filename)
  144.  
  145.      /* Rockbox checksums are big-endian */
  146.      file_checksum = betoh32(file_checksum);
  147. +#ifdef CPU_PP
  148. +    CPU_MESSAGE = COP_REBOOT;
  149. +    COP_CTL = PROC_WAKE;
  150. +#endif
  151.  
  152.      lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
  153.  

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