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Anonymous
Saturday, February 24th, 2007 at 11:55:34am UTC 

  1. diff --git a/apps/main.c b/apps/main.c
  2. index a912e07..ed7ca29 100644
  3. --- a/apps/main.c
  4. +++ b/apps/main.c
  5. @@ -550,9 +550,28 @@ void cop_main(void)
  6.     platforms which support it.
  7.  
  8.     At present all we do is send the COP to sleep if anything wakes it. */
  9. -    while(1) {
  10. +    long i;
  11. +    unsigned long* memmapregs = (unsigned long*)0xf000f000;
  12. +
  13. +    (*(volatile unsigned long*)(0x60004134)) |= 0x10; /* Set mailbox interrupt */
  14. +
  15. +    while(CPU_MESSAGE != COP_REBOOT) {
  16.          COP_CTL = PROC_SLEEP;
  17.      }
  18. +    COP_REPLY = 1;
  19. +    /* Invalidate cache */
  20. +    outl(inl(0xf000f044) | 0x6, 0xf000f044);
  21. +    while ((inl(0x6000c000) & 0x8000) != 0) {}
  22. +   
  23. +    /* Disable cache */
  24. +    outl(0x0, 0x6000C000);
  25. +
  26. +
  27. +    asm volatile(
  28. +        "mov   r0, #0x10000000   \n"
  29. +        "mov   pc, r0            \n"
  30. +    );
  31. +
  32.  }
  33.  #endif
  34.  
  35. diff --git a/firmware/export/config.h b/firmware/export/config.h
  36. index 1a3e0be..ac2ee68 100644
  37. --- a/firmware/export/config.h
  38. +++ b/firmware/export/config.h
  39. @@ -280,6 +280,8 @@
  40.  
  41.  #define NUM_CORES 1
  42.  #define CURRENT_CORE 0
  43. +
  44. +#define COP_REBOOT 0x00000001
  45.  #else
  46.  #define NUM_CORES 1
  47.  #define CURRENT_CORE 0
  48. diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
  49. index d304895..d9fd738 100644
  50. --- a/firmware/export/pp5020.h
  51. +++ b/firmware/export/pp5020.h
  52. @@ -25,6 +25,15 @@
  53.  #define CPU_CTL          (*(volatile unsigned long *)(0x60007000))
  54.  #define COP_CTL          (*(volatile unsigned long *)(0x60007004))
  55.  
  56. +/* Mailboxes */
  57. +/* Each processor has two mailboxes it can write to and two which
  58. +   it can read from.  We define the first to be for sending messages
  59. +   and the second for replying to messages */
  60. +#define CPU_MESSAGE      (*(volatile unsigned long *)(0x60001000))
  61. +#define COP_MESSAGE      (*(volatile unsigned long *)(0x60001004))
  62. +#define CPU_REPLY        (*(volatile unsigned long *)(0x60001008))
  63. +#define COP_REPLY        (*(volatile unsigned long *)(0x6000100c))
  64. +
  65.  #define GPIOA_ENABLE     (*(volatile unsigned long *)(0x6000d000))
  66.  #define GPIOB_ENABLE     (*(volatile unsigned long *)(0x6000d004))
  67.  #define GPIOC_ENABLE     (*(volatile unsigned long *)(0x6000d008))
  68. diff --git a/firmware/rolo.c b/firmware/rolo.c
  69. index 84b3280..05778da 100644
  70. --- a/firmware/rolo.c
  71. +++ b/firmware/rolo.c
  72. @@ -78,6 +78,9 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
  73.          : : "a"(dest)
  74.      );
  75.  #elif (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024)
  76. +
  77. +    CPU_MESSAGE = COP_REBOOT;
  78. +    while(COP_REPLY != 1) {}
  79.      /* Flush cache */
  80.      outl(inl(0xf000f044) | 0x2, 0xf000f044);
  81.      while ((inl(0x6000c000) & 0x8000) != 0) {}
  82. @@ -85,6 +88,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
  83.      /* Disable cache */
  84.      outl(0x0, 0x6000C000);
  85.  
  86. +   
  87.      /* Reset the memory mapping registers to zero */
  88.      for (i=0;i<8;i++)
  89.          memmapregs[i]=0;

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